3 // Generated by Microsoft (R) D3D Shader Disassembler
6 // fxc /nologo /Qstrip_reflect /T vs_4_0 /E VS /Fh
7 // Z:/projects/apitrace/tests/apps/d3dcommon/tri_vs_4_0.h
8 // Z:/projects/apitrace/tests/apps/d3dcommon/tri.fx
13 // Name Index Mask Register SysValue Format Used
14 // -------------------- ----- ------ -------- -------- ------- ------
15 // POSITION 0 xyzw 0 NONE float xyzw
16 // COLOR 0 xyzw 1 NONE float xyzw
21 // Name Index Mask Register SysValue Format Used
22 // -------------------- ----- ------ -------- -------- ------- ------
23 // SV_POSITION 0 xyzw 0 POS float xyzw
24 // COLOR 0 xyzw 1 NONE float xyzw
29 dcl_output_siv o0.xyzw, position
34 // Approximately 0 instruction slots used
39 68, 88, 66, 67, 97, 176,
40 115, 92, 95, 18, 113, 92,
41 95, 52, 139, 63, 171, 185,
57 80, 79, 83, 73, 84, 73,
58 79, 78, 0, 67, 79, 76,
59 79, 82, 0, 171, 79, 83,
71 79, 83, 73, 84, 73, 79,
72 78, 0, 67, 79, 76, 79,
73 82, 0, 171, 171, 83, 72,
83 101, 0, 0, 3, 242, 32,