3 // Generated by Microsoft (R) D3D Shader Disassembler
6 // fxc /nologo /Qstrip_reflect /T vs_4_0_level_9_1 /E VS /Fh
7 // Z:/projects/apitrace/tests/apps/d3dcommon/tri_vs_4_0_level_9_1.h
8 // Z:/projects/apitrace/tests/apps/d3dcommon/tri.fx
13 // Name Index Mask Register SysValue Format Used
14 // -------------------- ----- ------ -------- -------- ------- ------
15 // POSITION 0 xyzw 0 NONE float xyzw
16 // COLOR 0 xyzw 1 NONE float xyzw
21 // Name Index Mask Register SysValue Format Used
22 // -------------------- ----- ------ -------- -------- ------- ------
23 // SV_POSITION 0 xyzw 0 POS float xyzw
24 // COLOR 0 xyzw 1 NONE float xyzw
27 // Runtime generated constant mappings:
29 // Target Reg Constant Description
30 // ---------- --------------------------------------------------
31 // c0 Vertex Shader position offset
34 // Level9 shader bytecode:
39 mad oPos.xy, v0.w, c0, v0
43 // approximately 3 instruction slots used
47 dcl_output_siv o0.xyzw, position
52 // Approximately 0 instruction slots used
57 68, 88, 66, 67, 200, 135,
58 140, 149, 126, 224, 232, 55,
59 199, 118, 64, 71, 204, 172,
65 65, 111, 110, 57, 116, 0,
67 0, 2, 254, 255, 76, 0,
73 0, 2, 254, 255, 31, 0,
80 228, 160, 0, 0, 228, 144,
82 12, 192, 0, 0, 228, 144,
84 15, 224, 1, 0, 228, 144,
85 255, 255, 0, 0, 83, 72,
95 101, 0, 0, 3, 242, 32,
101 242, 32, 16, 0, 1, 0,
104 0, 1, 73, 83, 71, 78,
115 80, 79, 83, 73, 84, 73,
116 79, 78, 0, 67, 79, 76,
117 79, 82, 0, 171, 79, 83,
128 0, 0, 83, 86, 95, 80,
129 79, 83, 73, 84, 73, 79,
130 78, 0, 67, 79, 76, 79,